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ISICAS 2021 Technical Program
Conference will be held Singapore Standard Time (UTC+8 hours)
Time Converter
Important Note: All program schedules are preliminary, and subject to changes in order to accommodate the fluid situation surrounding the event. All paper presentations will be about 15 minutes, followed by a 3 minutes Q&A session.
Day 1: 9th Dec. 2021 (Thursday)
| Time | Keynote Speakers | Title |
| 09:00-10:00 | Professor Antonio Liscidini University of Toronto, Canada |
Quantized-Analog Signal Processing |
| 10:00-11:00 | Professor Gert Cauwenberghs UC San Diego, USA |
Silicon Integrated Circuits and Systems for Neuromorphic Intelligence |
| 11:00-12:00 | Professor Massimo Alioto Department of Electrical and Computer Engineering, National University of Singapore, Singapore |
Silicon Systems for a Greener and Smarter World - Without a Single Battery |
| 15:00-18:00 | Replay of the 3 keynotes will be broadcast in the afternoon. | |
Day 2: 10th Dec. 2021 (Friday)
On Friday, the hybrid event will be held at Marina Bay Sands, Singapore. On-site speakers and participants will be hosted at the Conference Venue. The morning session will be broadcast live to online participants. Physical Venue: Convention Centre, MICE, L3, Begonia JR Ballroom, Marina Bay Sands (MBS)| Time | Physical Venue | Virtual Room A | Virtual Room B |
| 09:00-09:30 | Morning Refreshments | - | - |
| 09:30-9:40 | Live Broadcast via online platform Opening address by Prof Amara Amara, President, IEEE CASS Opening address by Prof Bah Hwee GWEE, General Co-Chair |
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| 9:40-10:15 | Live Broadcast via online platform Presentation of CASS Mentoring Program, by Prof Yong Lian, CASS Past President Presentation of CASS Student Support, by Prof Yoshifumi Nishio, CASS VP RAM |
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| 10:15-12:00 | Live Broadcast via online platform Session 1, Low Power Circuits and Systems |
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| 12:00-13:30 | Lunch Break | ||
| 13:30-15:00 | Graduate Student Poster Special Session | Session 2-A Novel Biomedical Circuits and Systems for Bio-signal Sensing |
Session 2-B Communication Systems I |
| 15:00-15:30 | Afternoon Refreshments | - | - |
| 15:30-17:00 | - | Session 3-A Communication Systems II |
Session 3-B Data Converters II |
| 18:00-21:30 | Gala Dinner at Marina Bay Sands Singapore | - | - |
Day 3: 11th Dec. 2021 (Saturday)
On Saturday, the event will be fully virtual. All speakers and participants will connect via the online platform. Please keep in mind that given the uncertainties due to the Covid-19, the technical program may need some adjustments.| Time | Virtual Room A | Virtual Room B | Virtual Room C |
| 09:00-10:30 | Session 4-A Low Power Circuits for IoT Applications |
Session 4-B Communication Circuits I |
Session 4-C Test and Measurement Circuits |
| 10:30-11:00 | Break | ||
| 11:00-12:30 | Session 5-A Low Power Analog Circuits |
Session 5-B Communication Circuits II |
Session 5-C Low Power and Low Voltage circuits |
| 12:30-13:30 | Break | ||
| 13:30-15:00 | Session 6-A Wearable Medical Devices |
Session 6-B Sensors and Low Power Circuits |
Session 6-C Neuromorphic Circuits and Systems |
| 15:00-15:30 | Break | ||
| 15:30-17:00 | Session 7-A Data Converters I |
Session 7-B FPGA and Memory circuits and Systems |
Session 7-C Security-Machine Learning |
| 17:00-18:00 | Closing Ceremony Annoucement on ISICAS 2022 | ||
Day 2: 10th Dec. 2021 (Friday)
Session 1: Low Power Circuits and Systems
Room: MBS Singapore
Chair: Junwei Lee, Nanyang Technological University
Paper 1
Title: A 0.6-to-1.8V Trimming-Less CMOS Current Reference with Near-100% Power Utilization
Paper 2
Title: A 0.007 mm2 0.6 V 6 MS/s Low-Power Double Rail-to-Rail SAR ADC in 65-nm CMOS
Session 2-A: Novel Biomedical Circuits and Systems for Bio-signal Sensing
Room: Virtual Room A
Chair: Noor Ain Kamsani, Universiti Putra Malaysia
Co-Chair: Zhongyuan Fang, Nanyang Technological University
Paper 1
Title: A 4-µW Analog Front End Achieving 2.4 NEF for Long-Term ECG Monitoring
Paper 2
Title: Current-mode Dielectric Spectroscopy for Liquid Permittivity Measurement
Paper 3
Title: RISC-V CNN Coprocessor for Real-Time Epilepsy Detection in Wearable Application
Paper 4
Title: A Mixed-Signal Chip-Based Configurable Coherent Photoacoustic-Radar Sensing Platform for In Vivo Temperature Monitoring and Vital Signs Detection
Session 2-B: Communication Systems I
Room: Virtual Room B
Chair: Weifeng He, Shanghai Jian Tong University
Co-Chair: Yuan-Hao Huang, National Tsing Hua University
Paper 1
Title: Bayesian Neural Networks for Identification and Classification of Radio Frequency Transmitters Using Power Amplifiers’ Nonlinearity Signatures
Paper 2
Title: Low-Latency Lattice-Reduction-Aided One-Bit Precoding Processor for 64-QAM 4×64 MU--MIMO Systems
Paper 3
Title: A High-Efficiency Segmented Reconfigurable Cyclic Shifter for 5G QC-LDPC Decoder
Paper 4
Title: An Interference-Tolerant Synchronization Scheme for Wireless Communication Systems Based on Direct Sequence Spread Spectrum
Paper 5
Title: A Wideband Sliding Correlation Channel Sounder in 65 nm CMOS as a Single-board Solution
Session 3-A: Communication Systems II
Room: Virtual Room A
Chair: Yuan Du, Nanjing University
Paper 1
Title:A 26GHz Fractional-N Digital Frequency Synthesizer Leveraging Noise Profiles of Three Functional Stages
Paper 2
Title:A Goertzel Filter Based System for Simultaneous Multi-Frequency EIS
Paper 3
Title:A 529 μW Fractional-N All-Digital PLL Using TDC Gain Auto-Calibration and an Inverse-Class-F DCO in 65-nm CMOS
Paper 4
Title:A Novel Module-Sign Low-Power Implementation for the DLMS Adaptive Filter with Low Steady-State Error
Paper 5
Title:Arithmetic and Logic Circuits Based on ITO-Stabilized ZnO TFT for Transparent Electronics
Session 3-B: Data Converters II
Room: Virtual Room B
Chair: Jose M. de la Rosa, Institute of Microelectronics of Seville (IMSE)
Co-Chair: Yuhua Liang, Xidian University
Paper 1
Title: 64 dB Dynamic-Range 810 µW 90 MHz Fully-Differential Flipped-Source-Follower Analog Filter in CMOS 28 nm
Paper 2
Title: A 38.6-fJ/Conv.-Step Inverter-Based Continuous-Time Bandpass ∆Σ ADC in 28 nm Using Asynchronous SAR Quantizer
Paper 3
Title: On The Linearity of BJT-Based Current-Mode DAC Drivers
Paper 4
Title: A Supply Voltage Noise Immunity Enhancement Design for High-Voltage Gate Driver IC based on Bootstrap Circuit
Day 3: 11th Dec. 2021 (Saturday)
Session 4-A: Low Power Circuits for IoT Applications
Room: Virtual Room A
Chair: Hao Cai, Southeast University
Co-Chair: Teerachot Siriburanon, University College Dublin
Paper 1
Title: A 10 nA Ultra-low Quiescent Current and 60 ns Fast Transient Response Low-dropout Regulator for Internet-of-Things
Paper 2
Title: A Sub-μW Reversed-Body-Bias 8-bit Processor on 65-nm Silicon-On-Thin-Box (SOTB) for IoT Applications
Paper 3
Title: A 4.82nJ/pixel Stereo-depth Coprocessor with Pixel-level Pipeline and Region-Optimized Semi-Global Matching for IoT Application
Paper 4
Title: A Low-Power Asynchronous RISC-V Processor with Propagated Timing Constraints Method
Paper 5
Title: An Ultra-Low Quiescent Current Tri-mode DC-DC Buck Converter with 92.1% Peak Efficiency for IoT Applications
Session 4-B: Communication Circuits I
Room: Virtual Room B
Chair: Li Du, Nanjing University
Co-Chair: Yajun Ha, ShanghaiTech University
Paper 1
Title: High-Precision Sub-Nyquist Sampling System based on Modulated Wideband Converter for Communication Device Testing
Paper 2
Title: A Broadband Fully Integrated Power Amplifier Using Waveform Shaping Multi-Resonance Harmonic Matching Network
Paper 3
Title: A 28 GHz Sub-Sampling PLL with a Reduced-Area, Capacitor-Only Loop Filter and Polarity-Switched Transconductor
Paper 4
Title: A Millimeter-Wave CMOS VCO Featuring a Mode-Ambiguity-Aware Multi-Resonant-RLCM Tank
Paper 5
Title: A Broadband Differential Linear Driver with Channel Mismatch Cancellation and Bandwidth Extension for B-PLC Applications
Session 4-C: Test and Measurement Circuits
Room: Virtual Room C
Chair: Yan Liu, Shanghai Jiao Tong University
Co-Chair: De Matteis, Marcello, University of Milan
Paper 1
Title: Mismatch Analysis of DTCs with an Improved BIST-TDC in 28nm CMOS
Paper 2
Title: Accurate and Fast On-wafer Test Circuitry Integrated with a 140-dB-Input-Range Current Digitizer for Parameter Tests in WAT
Paper 3
Title: A 0.02–2-GHz Inductorless Two-Fold Noise-Canceling Low-Noise Amplifier in 28-nm CMOS
Paper 4
Title: An Independent Dynamic Dead-Time Control for Reliable High-Voltage High-Frequency Half-Bridge Converters
Session 5-A: Low Power Analog Circuits
Room: Virtual Room A
Chair: Yanhan Zeng, Gangzhou University
Paper 1
Title: A 0.22μW Time-Domain Sensor-to-Digital Front-End with Reduced Supply Sensitivity for Energy Harvesting Applications
Paper 2
Title: A High-Sensitivity Wide Input-Power-Range Ultra-Low-Power RF Energy Harvester for IoT Applications
Paper 3
Title: Slew-Rate Booster and Frequency Compensation Circuit for Automotive LDOs
Paper 4
Title: Automotive Switched-Capacitor DC-DC Converter with High BW Power Mirror and Dual Supply Driver
Paper 5
Title: A Switched-Capacitor Bandgap Voltage Reference for IoT Applications
Session 5-B: Communication Circuits II
Room: Virtual Room B
Chair: Chuan Zhang, Southeast University
Paper 1
Title: Compact E-band I/Q Receiver in SiGe BiCMOS for 5G backhauling applications
Paper 2
Title: A 56-Gb/s PAM4 Analog Front-End with Fixed Peaking Frequency and Bandwidth in 40-nm CMOS
Paper 3
Title: A 600-μm2 Ring-VCO-Based Hybrid PLL Using a 30-μW Charge-Sharing Integrator in 28-nm CMOS
Paper 4
Title: A 3.36-GHz Locking-Tuned Type-I Sampling PLL with -78.6-dBc Reference Spur Merging Single-Path Reference-Feedthrough-Suppression and Narrow-Pulse-Shielding Techniques
Paper 5
Title: Exploiting Parasitic Capacitances in 3-D Inductors to Design RF CMOS Quasi-Elliptic-Type Broad-Band Bandpass Filters
Session 5-C: Low Power and Low Voltage circuits
Room: Virtual Room C
Chair: Jian Zhao, Shanghai Jiao Tong University
Co-Chair: Jotschke, Marcel, Fraunhofer Institute for Integrated Circuits IIS
Paper 1
Title: A -40 ℃ to 140 ℃ Picowatt CMOS Voltage Reference with 0.25-V Power Supply
Paper 2
Title: High-Speed Dynamic Level Shifter for High-Side Bootstrapped Gate Driver in High-Voltage Buck Regulators
Paper 3
Title: A 300mV-Supply, sub-nW-Power Digital-Based Operational Transconductance Amplifier
Paper 4
Title: Adaptive Maximum Power Point Tracking with Model-Based Negative Feedback Control and Improved V-f Model
Paper 5
Title: A New Energy-Efficient and High Throughput Two-Phase Multi-Bit Per Cycle Ring Oscillator-based True Random Number Generator
Session 6-A: Wearable Medical Devices
Room: Virtual Room A
Chair: Dai Jiang, University College of London
Co-Chair: Tutun Juhana, Institut Teknologi Bandung
Paper 1
Title: A Low-Power Sigma-Delta Modulator for Healthcare and Medical Diagnostic Applications
Paper 2
Title: A 1.3 µW Event-Driven ANN Core for Cardiac Arrhythmia Classification in Wearable Sensors
Paper 3
Title: A 19―48.3-GHz 6th-order Transformer-based Injection-locked Frequency Divider with 87.1% Locking Range in 40-nm CMOS
Paper 4
Title: Ternary LDPC Error Correction for Arrhythmia Classification in Wireless Wearable Electrocardiogram Sensors
Paper 5
Title: A MEMS-CMOS Microsystem for Contact-less Human Body Temperature Measurements and Presence, Motion and Proximity Detection
Session 6-B: Sensors and Low Power Circuits
Room: Virtual Room B
Chair: Feng Zhang, IME of Chinese Academy of Sciences
Paper 1
Title: Senputing: An Ultra-Low-Power Always-On Vision Perception Chip Featuring the Deep Fusion of Sensing and Computing
Paper 2
Title: A Raw Image-based End-to-end Object Detection Accelerator using HOG Features
Paper 3
Title: NS-MD: Near-Sensor Motion Detection with Energy Harvesting Image Sensor for Always-On Visual Perception
Paper 4
Title: Flexible Multi-Channel Analog-Frontend for Ultra-Low Power Environmental Sensing
Paper 5
Title: A High-Efficiency Dual-Antenna RF Energy Harvesting System using Full-Energy Extraction with Improved Input Power Response.
Session 6-C: Neuromorphic Circuits and Systems
Room: Virtual Room C
Chair: Xin Luo, ShanghaiTech University
Co-Chair: Alex James, Indian Institute of Information Technology and Management
Paper 1
Title: A Time-Domain Binary CNN Engine with Error-Detection based Resilience in 28nm CMOS
Paper 2
Title: Energy Efficient 0.5V 4.8pJ/SOP 0.93µW Leakage/Core Neuromorphic Processor Design
Paper 3
Title: Balancing the Cost and Performance Trade-offs in SNN Processors
Paper 4
Title: MuGRA: A Scalable Multi-Grained Reconfigurable Accelerator Powered by Elastic Neural Network
Paper 5
Title: Vau da Muntanialas: Energy-Efficient Multi-Die Scalable Acceleration of RNN Inference
Session 7-A: Data Converters I
Room: Virtual Room A
Chair: Wei Mao, Southern University of Science and Technology
Paper 1
Title: Multi-channel Analog-to-Digital Conversion Using a Delta-Sigma Modulator Without Reset and a Modulated-Sinc-Sum Filter
Paper 2
Title: A 16-bit Calibration-Free SAR ADC with Binary-Window and Capacitor-Swapping DAC Switching Schemes
Paper 3
Title: A Single-Opamp Third Order CT ΔΣ Modulator with SAB-ELD-Merged Integrator and Three-Stage Hybrid Compensation Opamp
Paper 4
Title: A SiGe HBT 6th-order 10GHz Inductor-less Anti-aliasing Low-pass Filter for High-speed ATI Digitizers
Session 7-B: FPGA and Memory circuits and Systems
Room: Virtual Room B
Chair: Tutun Juhana, Institut Teknologi Bandung
Paper 1
Title: HAMBug: A Hybrid CPU-FPGA System to Detect Race Conditions
Paper 2
Title: An Optimized FPGA-Based Real-Time NDT for 3D-LiDAR Localization in Smart Vehicles
Paper 3
Title: An FPGA-Based Energy-Efficient Reconfigurable Convolutional Neural Network Accelerator for Object Recognition Applications
Paper 4
Title: 200-MHz Single-ended 6T 1-kb SRAM with 0.2313 pJ Energy/Access Using 40-nm CMOS Logic Process
Paper 5
Title: In-Situ Aging-aware Error Monitoring Scheme for IMPLY-based Memristive Computing-in-Memory Systems
Session 7-C: Security-Machine Learning
Room: Virtual Room C
Chair: Jose M. de la Rosa, Institute of Microelectronics of Seville (IMSE)
Co-Chair: Bayoumi, Magdy, University of Louisiana
Paper 1
Title: A Wide-Range Area-Efficient Physically Unclonable Function with High Machine Learning Attack Resilience in 28-nm CMOS
Paper 2
Title: A Low-Power Multiband Blocker-Tolerant Receiver with a Steep Filtering Slope Using an N-Path LNA with Feedforward OB Blocker Cancellation and Filtering-By-Aliasing Baseband
Paper 3
Title: A 4T/Cell Amplifier-Chain-Based XOR PUF With Strong Machine Learning Attack Resilience
Paper 4
Title: A Dual-Entropy-Superposed PUF with In-Cell Entropy Sign Based Stabilization
Paper 5
Title: Self-Healing Router Approach for High-Performance Network-on-Chip