Keynote Speeches

Speaker: Professor Antonio Liscidini, University of Toronto, Canada

Professor Antonio Liscidini

Title: Quantized-Analog Signal Processing
Abstract: Nowadays, both digital and analog electronics are reaching fundamental limits that will require revolutionary approaches to satisfy the power/bandwidth requirements of the next generation of data-driven applications. In the first part of the talk, analog and digital signal processing will be compared in terms of power efficiency by highlighting the presence of a thermodynamic upper-bound which relates dynamic range, bandwidth and power dissipation. To circumvent this limit, in the second part of the talk, the quantized-analog signal processing will be introduced. In such approach, analog and digital domains are merged together in a more fluid scenario compared to traditional mixed-signal circuits avoiding the needs of rigid interfaces such as analog-to-digital and digital-to-analog converters. It will be shown that the quantized-analog signal processing leads to superior power efficiency and flexibility compared to its analog counterpart and it represents a good candidate for the development of a new generation of mixed signal integrated circuits. The effectiveness of the proposed solutions will be demonstrated through simulations and measurement results.

Biography: Antonio Liscidini received the Laurea (summa cum laude) and Ph.D. degrees in electrical engineering from the University of Pavia, Pavia, Italy, in 2002 and 2006, respectively. He was a summer Intern with National Semiconductors, Santa Clara, CA, USA, in 2003, studying poly phase filters and CMOS low-noise amplifiers. From 2008 to 2012, he was an Assistant Professor with the University of Pavia and a consultant with Marvell Semiconductors, Pavia, in the area of integrated circuit. In 2012, he moved to the Edward S. Rogers Sr. Department of Electrical and Computer Engineering, University of Toronto, Toronto, ON, Canada, where he is currently an Associate professor. In 2019 he has become consultant for Huawei Technology Group in the area of RFIC for optical communication. His research interests are focused on analog mixed signal interfaces with particular emphasis on the implementations of transceivers and frequency synthesizers for wireless and wireline communication.
Dr. Liscidini was a recipient of the Best Student Paper Award at the IEEE 2005 Symposium on VLSI Circuits and co-recipient of the Best Invited Paper Award at the 2011 IEEE CICC and the Best Student Paper Award at the 2018 IEEE ESSCIRC. He has served as an Associate Editor for the Open-Journal of Solid State Circuits Society, the IEEE Transactions on Circuits and Systems II: Express Briefs (2008-2011) (2017- 2018) and as a Guest Editor for the IEEE Journal of Solid-State Circuits (2013) (2016) and Guest Editor of the IEEE RFIC Virtual Journal (2018). He has been member of the ISSCC TPC (2012- 2017), of the ESSCIRC TPC (2010-2018), and of the CICC TPC (2019-currently). Between 2016 and 2018, he has been a Distinguished Lecturer of the IEEE Solid-State Circuits Society.

Speaker: Professor Gert Cauwenberghs, Department of Bioengineering, and Institute for Neural Computation, UC San Diego, La Jolla CA, USA

Professor Gert Cauwenberghs

Title: Silicon Integrated Circuits and Systems for Neuromorphic Intelligence
Abstract: The mammalian brain offers an existence proof of remarkable general intelligence acting in complex environments, realized by hierarchical assemblies of massively parallel, yet imprecise and slow compute elements that operate near fundamental limits of noise and energy efficiency. Neuromorphic instantiations approaching such natural intelligence in very large-scale integrated circuits on custom-designed silicon microchips have evolved from highly specialized, task-specific compute-in-memory neural and synaptic crossbar array architectures that operate near the efficiency of synaptic transmission in the mammalian brain, to large tiles of such neurosynaptic cores assembled into hierarchically interconnected networks for general-purpose learning and inference. By combining extreme efficiency of local interconnects (grey matter) with great flexibility and sparsity in global interconnects (white matter), these assemblies are capable of realizing a wide class of deeply layered and recurrent neural architectures with embedded local plasticity for on-line learning, at a fraction of the computational and energy cost of digital implementations on conventional CPU and GPU hardware.

Biography: Gert Cauwenberghs is Professor of Bioengineering and Co-Director of the Institute for Neural Computation at UC San Diego. He received the Ph.D. in Electrical Engineering from Caltech in 1994, and was previously Professor of Electrical and Computer Engineering at Johns Hopkins University, and Visiting Professor of Brain and Cognitive Science at MIT. His research focuses on neuromorphic engineering, adaptive intelligent systems, neuron-silicon and brain-machine interfaces, and micropower biomedical instrumentation. He is a Fellow of the Institute of Electrical and Electronic Engineers (IEEE) and the American Institute for Medical and Biological Engineering (AIMBE), and was a Francqui Fellow of the Belgian American Educational Foundation. He previously received NSF CAREER, ONR Young Investigator Program and White House PECASE awards. He served IEEE in a variety of roles including as Editor-in-Chief of the IEEE Transactions on Biomedical Circuits and Systems and as Distinguished Lecturer of the Circuits and Systems Society.

Speaker: Professor Massimo Alioto, Department of Electrical and Computer Engineering, National University of Singapore, Singapore

Professor Massimo Alioto

Title: Silicon Systems for a Greener and Smarter World - Without a Single Battery
Abstract: Recent semiconductor scaling trends continue to support the evolution of silicon systems beyond the inevitable end of technology scaling, growing the deployment of intelligent and connect chips towards the trillion range by the end of the decade. Such evolution vastly outranges any application ever deployed by human beings, and its sustained growth is now fundamentally impeded by batteries as conventional source of energy. From a silicon chip viewpoint, batteries at the trillion scale severely limit advances in cost, form factor, system lifespan and chip availability over time. From a societal perspective, batteries in the trillions threaten economic and environmental sustainability of the underlying scaling trend, and hence its feasibility. This keynote introduces key concepts and silicon demonstrations of a new breed of always-on silicon systems with ultra-wide power adaptation down to nWs, and no battery inside (or other energy storage). Adaptation to the highly-fluctuating power profile of energy harvesters is shown to enable next-generation pervasive integrated systems with cost well below 1$, size of few millimeters, long lifetime well beyond the traditional shelf life of batteries, yet at near-100% up-time. The principles are exemplified by numerous silicon demonstrations of sensor interfaces, processing, power management and wireless communications, as well as of full systems. Ultimately, the technological pathway discussed in this keynote supports the sustained growth of applications leveraging large-scale deployments of silicon systems, making our planet smarter. And greener too.

Biography: Massimo Alioto is a Professor at the ECE Department of the National University of Singapore, where he leads the Green IC group, the Integrated Circuits and Embedded Systems area, and the FD-fAbrICS center on intelligent&connected systems. Previously, he held positions at the University of Siena, Intel Labs – CRL (2013), University of Michigan - Ann Arbor (2011-2012), University of California – Berkeley (2009-2011), EPFL - Lausanne.
He is (co)author of 300+ publications on journals and conference proceedings, and four books with Springer. His primary research interests include ultra-low power and self-powered systems, green computing, circuits for machine intelligence, hardware security, and emerging technologies.
He is the Editor in Chief of the IEEE Transactions on VLSI Systems, Distinguished Lecturer for the IEEE Solid-State Circuits Society, and was Deputy Editor in Chief of the IEEE Journal on Emerging and Selected Topics in Circuits and Systems. Previously, Prof. Alioto was the Chair of the “VLSI Systems and Applications” Technical Committee of the IEEE Circuits and Systems Society (2010-2012), Distinguished Lecturer (2009-2010) and member of the Board of Governors (2015-2020). He served as Guest Editor of numerous journal special issues, Technical Program Chair of several IEEE conferences (ISCAS 2023, SOCC, PRIME, ICECS), and TPC member (ISSCC, ASSCC). Prof. Alioto is an IEEE Fellow.

Last Updated on: June 23, 2021